Compact Motor-Controllers for BLDC, BDC, or Stepper Motors

After having served a rapidly growing market with our popular HVC 4x fully programmable, automotive motor drivers for many years, the HVC 5x family presents an evolution from the “one size fits all” approach of their HVC 4x with a focus on smaller size, lower cost, and less external components. To increase supply robustness, the HVC 4x and HVC 5x families are sourced from two different wafer foundries.

The new HVC 5223C is focused on three-phase brushless motor applications with half the on-resistance and twice the peak current capability of the HVC 5222C.

HVC 5221D, HVC 5222C, and HVC 5223C are all 32 KB flash devices with 2 KB SRAM and 512 byte EEPROM. To maintain compatibility to the HVC 4x family, all HVC 5x devices uses the same Arm® Cortex®-M3 CPU based microcontroller with largely the same peripheral motor‑control features and LIN bus connectivity as their predecessors.

The general‑purpose I/O pins (LGPIO) have been reduced to seven and some power supply pins have been eliminated to reduce the bill of material (BOM). A WAKE input and an external reset pin have been added to increase application flexibility.

Additional features, such as differential input channels, digital timers, capture‑compare units, and an SPI master interface enable integration of application functions as well as TDK‑Micronas’ large portfolio of Hall switches or 2D/3D sensors for more precise motor control.

All current HVC 5x devices are qualified according to AEC-Q100 Grade 1, come in a thermally efficient 5 x 5 mm PQFN24 package and are pin compatible with each other as well as with future devices with higher currents and more memory.

HVC 5x Variants
HVC 5221D: 0.5A Universal Motor Controller with 32 KB Flash and LIN
HVC 5x22D: 1A Universal Motor Controller with 32/64 KB Flash and LIN
HVC 522xC: 1A/2A Controller for BLDC or BDC motors with 32 KB Flash and LIN

*IP-Notice: If LIN auto-addressing features are used, third-party rights such as EP 1490 772 B should be considered.

Block diagram – System Architecture

主な特長

Supply voltage range from 6 V to 18 V (transient from 4.5 to 40 V)
4 x 500 mA (HVC 5221D), 3 x 1 A (HVC 5222C), or 3 x 2 A (HVC 5223C) peak current half-bridge drivers
3.3 V, 15 mA supply for peripherals
32-bit Arm^® Cortex^®-M3 CPU core
20 MHz system clock, 35 kHz watchdog oscillator
32 KB flash memory with 2 KB SRAM
12-bit, 1 µs ADC for internal and external measurements
2 x 8 bit current DAC for motor current limiting from 2 mA to 500 mA
12-bit PWM generators with center- and edge alignment and ADC triggering
16-bit timers for input and output PWM signal handling
7 GPIOs for application interface
LIN Transceiver for auto-addressing using the bus shunt method*
Small thermally efficient QFN24 package