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Micronas Introduces the World's First Single-Board Reference Design for Processing Analog and Digital TV Signals (0411)

- Trade News | 0411

Fully integrated hybrid analog/digital TV chassis design minimizes component count and system costs

Freiburg/Munich, Germany - May 24, 2004 - Micronas today introduces the world's first IDTV reference design for the complete signal processing of digital and analog signals on one single board. The new reference board "PEPER Digital" allows the design of 100 Hz CRT integrated digital TVs (IDTVs). CRT-based products will represent the lion's share of the mainstream TV market over the next few years.

To enable the reception of digital programs, few existing analog TVs feature a dedicated slot to plug in an additional digital module. With digital TV reception becoming more and more a mainstream feature it makes sense from a TV manufacturers perspective to integrate the digital functionality on one hybrid chassis. Micronas overcomes this integration hurdle by offering a simple, cost-effective and very flexible solution which combines the MDE 9502B, a hybrid single-chip decoder for DVB and analog TV, the digital IF demodulator DRX 3960A, the multistandard sound processor MSP 4458G and the digital display and deflection processor DDP 3315C on one single board.

"The PEPER digital solution enables TV manufacturers to develop hybrid analog/digital TVs. In markets where the broadcasting of digital programs dominates, for example the UK, Italy and metropolitan areas in Germany, hybrid solutions offer decisive advantages", said Peter Rost, director marketing digital TV at Micronas. "The higher degree of integration allows consumers to receive digitally broadcasted programs with cost-effective TVs based on a single, convenient user interface for any mix of analog and digital channels. Together with our software-compatible MicModule solution for modular IDTVs, we cover DVB-based TV markets in early and mature stages of the transition from analog to digital broadcast."

The PEPER Digital board features a high degree of flexibility: TV manufacturers can select from a range of RF front-ends of a variety of manufacturers enabling the reception of digital programs via terrestrial antenna, satellite or cable.

The PEPER Digital reference design is part of the PEPER family, which includes versions for the reception of analog programs at 50 Hz and 100 Hz CRT display modes, as well as flat-panel TVs. The PEPER approach allows TV manufacturers to reduce the component count, save board space and logistic costs.

The hybrid single-chip decoder for DVB and analog TV, the MDE 9502B, builds the heart of the PEPER digital design. It combines the entire network-independent digital signal processing tasks of digital receivers, while supporting analog video decoding and processing, and ensuring that TV sets remain backwards compatible to the existing analog TV infrastructure. The high-performance on-screen display system supports DVB recommendations, the requirements of embedded and downloaded interactive TV applications. For system manufacturers, the MDE 95xx family of single-chip hybrid TV decoders offers a clear path through the transition phase from analog TV into the age of IDTV.

Besides the MDE 9502B, the PEPER Digital board consists of the DRX 3960A, the multistandard sound processor MSP 4458G and the digital display and deflection processor DDP 3315C.

About DRX 3960A

The DRX 3960A performs the entire multistandard Quasi Split Sound (QSS) TV IF processing, AGC, video demodulation, and generation of the second sound IF (SIF) with a single SAW filter. The IC is designed for applications in TV sets, VCRs, PC cards, and TV tuners. The alignment-free DRX 3960A needs a minimum of external components.

About MSP 4458G

The multistandard sound processors of the MSP 44xy family are the industry's most successful ICs for TV audio applications. They combine the function of a TV stereo decoder with an I²S codec and DSP audio processing features. The chips cover the demodulation and stereo decoding of all global analog TV standards, as well as the NICAM digital sound standards and FM stereo radio. The full demodulation and decoding is performed on a single chip, starting with the analog sound IF signal in, down to processed analog or digital AF out (baseband audio).

About DDP 3315C

The DDP 3315C is a mixed-signal single-chip digital display and deflection processor, designed for high-quality backend applications in double-scan and HDTV TV sets with 4:3 and 16:9 picture tubes. The DDP 3315C contains the entire digital video component and deflection processing, and provides all interfaces to control the CRT driver circuitry.

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